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[194.45.78.10]) by smtp.gmail.com with ESMTPSA id y20-20020a170906559400b0094a7e4dfed8sm2189942ejp.47.2023.04.14.02.50.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 14 Apr 2023 02:50:22 -0700 (PDT) From: Jesper Dangaard Brouer X-Google-Original-From: Jesper Dangaard Brouer Message-ID: <8214fb10-8caa-4418-8435-85b6ac27b69e@redhat.com> Date: Fri, 14 Apr 2023 11:50:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 To: Song Yoong Siang , Jesse Brandeburg , Tony Nguyen , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Alexei Starovoitov , Daniel Borkmann , Jesper Dangaard Brouer , John Fastabend , Maciej Fijalkowski , Vedang Patel , Jithu Joseph , Andre Guedes , Stanislav Fomichev , Jacob Keller References: <20230414020915.1869456-1-yoong.siang.song@intel.com> In-Reply-To: <20230414020915.1869456-1-yoong.siang.song@intel.com> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Message-ID-Hash: TJ2TKKXMFHVCZYEW3HLPSRYUKZKB7PD4 X-Message-ID-Hash: TJ2TKKXMFHVCZYEW3HLPSRYUKZKB7PD4 X-MailFrom: jbrouer@redhat.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: brouer@redhat.com, intel-wired-lan@lists.osuosl.org, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, bpf@vger.kernel.org, xdp-hints@xdp-project.net, stable@vger.kernel.org X-Mailman-Version: 3.3.8 Precedence: list Subject: [xdp-hints] Re: [PATCH net v2 1/1] igc: read before write to SRRCTL register List-Id: XDP hardware hints design discussion Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On 14/04/2023 04.09, Song Yoong Siang wrote: > igc_configure_rx_ring() function will be called as part of XDP program > setup. If Rx hardware timestamp is enabled prio to XDP program setup, > this timestamp enablement will be overwritten when buffer size is > written into SRRCTL register. > > Thus, this commit read the register value before write to SRRCTL > register. This commit is tested by using xdp_hw_metadata bpf selftest > tool. The tool enables Rx hardware timestamp and then attach XDP program > to igc driver. It will display hardware timestamp of UDP packet with > port number 9092. Below are detail of test steps and results. > > Command on DUT: > sudo ./xdp_hw_metadata > > Command on Link Partner: > echo -n skb | nc -u -q1 9092 > > Result before this patch: > skb hwtstamp is not found! > > Result after this patch: > found skb hwtstamp = 1677800973.642836757 > > Optionally, read PHC to confirm the values obtained are almost the same: > Command: > sudo ./testptp -d /dev/ptp0 -g > Result: > clock time: 1677800973.913598978 or Fri Mar 3 07:49:33 2023 > > Fixes: fc9df2a0b520 ("igc: Enable RX via AF_XDP zero-copy") > Cc: # 5.14+ > Signed-off-by: Song Yoong Siang > Reviewed-by: Jacob Keller > --- Reviewed-by: Jesper Dangaard Brouer > v2 changelog: > - Fix indention > --- > drivers/net/ethernet/intel/igc/igc_base.h | 7 +++++-- > drivers/net/ethernet/intel/igc/igc_main.c | 5 ++++- > 2 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/drivers/net/ethernet/intel/igc/igc_base.h b/drivers/net/ethernet/intel/igc/igc_base.h > index 7a992befca24..b95007d51d13 100644 > --- a/drivers/net/ethernet/intel/igc/igc_base.h > +++ b/drivers/net/ethernet/intel/igc/igc_base.h > @@ -87,8 +87,11 @@ union igc_adv_rx_desc { > #define IGC_RXDCTL_SWFLUSH 0x04000000 /* Receive Software Flush */ > > /* SRRCTL bit definitions */ I have checked Foxville manual for SRRCTL (Split and Replication Receive Control) register and below GENMASKs looks correct. > -#define IGC_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */ > -#define IGC_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */ > +#define IGC_SRRCTL_BSIZEPKT_MASK GENMASK(6, 0) > +#define IGC_SRRCTL_BSIZEPKT_SHIFT 10 /* Shift _right_ */ Shift due to 1 KB resolution of BSIZEPKT (manual field BSIZEPACKET) > +#define IGC_SRRCTL_BSIZEHDRSIZE_MASK GENMASK(13, 8) > +#define IGC_SRRCTL_BSIZEHDRSIZE_SHIFT 2 /* Shift _left_ */ This shift is suspicious, but as you inherited it I guess it works. I did the math, and it happens to work, knowing (from manual) value is in 64 bytes resolution. > +#define IGC_SRRCTL_DESCTYPE_MASK GENMASK(27, 25) > #define IGC_SRRCTL_DESCTYPE_ADV_ONEBUF 0x02000000 Given you have started using GENMASK(), then I would have updated IGC_SRRCTL_DESCTYPE_ADV_ONEBUF to be expressed like: #define IGC_SRRCTL_DESCTYPE_ADV_ONEBUF FIELD_PREP(IGC_SRRCTL_DESCTYPE_MASK, 0x1) Making it easier to see code is selecting: 001b = Advanced descriptor one buffer. And not (as I first though): 010b = Advanced descriptor header splitting. > #endif /* _IGC_BASE_H */ > diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c > index 25fc6c65209b..88fac08d8a14 100644 > --- a/drivers/net/ethernet/intel/igc/igc_main.c > +++ b/drivers/net/ethernet/intel/igc/igc_main.c > @@ -641,7 +641,10 @@ static void igc_configure_rx_ring(struct igc_adapter *adapter, > else > buf_size = IGC_RXBUFFER_2048; > > - srrctl = IGC_RX_HDR_LEN << IGC_SRRCTL_BSIZEHDRSIZE_SHIFT; > + srrctl = rd32(IGC_SRRCTL(reg_idx)); > + srrctl &= ~(IGC_SRRCTL_BSIZEPKT_MASK | IGC_SRRCTL_BSIZEHDRSIZE_MASK | > + IGC_SRRCTL_DESCTYPE_MASK); > + srrctl |= IGC_RX_HDR_LEN << IGC_SRRCTL_BSIZEHDRSIZE_SHIFT; > srrctl |= buf_size >> IGC_SRRCTL_BSIZEPKT_SHIFT; > srrctl |= IGC_SRRCTL_DESCTYPE_ADV_ONEBUF; >